The fabrication of integrated circuits typically begins with a first phase of wafer-scale fabrication of electronic elements on a silicon wafer. Each individual element is called a “die”, or simply a chip. They are diced and integrated into a package to form the integrated circuits. This first phase generally includes a step in which all the chips on the wafer are tested. A first entity is generally responsible for these wafer fabrication and test operations and a second, often separate, entity is concerned with finalizing the fabrication of the integrated circuits by assembling the chips and dicing the wafers and incorporating the chips into a package.
One approach for wafer testing involves depositing a mark on defective chips using ink, so that they can be visually identified when being subsequently diced. This approach requires management of the ink used, including its supply and its storage. It also requires a special machine for depositing the ink with great precision, and then an ink detection machine for sorting out the defective chips during the dicing operation. It should be pointed out that this technique is not suitable for very small chips. Finally, since the ink is by nature toxic, it is necessary to take precautions for protecting personnel and the environment. Finally, this approach is expensive and may have other drawbacks.
Another approach involves storing the test data in memory in an independent file. Such a file should first be able to identify the wafer in question, and then be able to identify each defective chip on the wafer by its coordinates x, y, for example. A drawback of this approach is that it requires the separate management of a file, which has to be transmitted from the first entity to the second, which then uses a specific tool to decipher it and make the link with the corresponding wafer to be able to remove the defective chips when the wafer is being diced. There is a risk of associating a file with the wrong wafer, or even a risk of losing the file. It should also be pointed out that there is no standard for such a file that would facilitate its use. The second entity may therefore be required to manage different processes for various wafer manufacturers.
At the end of fabrication, the second entity which has received the wafers dices them into the various chips. The chips may number from several tens of chips up to several thousand chips per wafer. The defective chips are removed, and the non-defective chips are then encapsulated in packages for future use.
The existing processes for fabricating integrated circuits therefore have the above-mentioned drawbacks, and there may be a need for a better approach.